起因:在多主单从的设计中,当多个源端同时发起传输请求时,需要仲裁器根据优先级来判断响应哪一个源端。 轮询仲裁:各个源端优先级相同,当其同时发起请求时,依次进行响应。
电路图
代码
module rr_arb( input clk, input rst_n, input req1, input req2, input req3, input req4, input busy, output reg [ 3 : 0 ] nx_arb_gnt
) ;
localparam S1= 4 'b0001, S2= 4 'b0010, S3= 4 'b0100, S4= 4 'b1000;
reg [ 3 : 0 ] cur_arb_gnt_r;
wire [ 3 : 0 ] cur_arb_gnt;
always @( posedge clk or negedge rst_n) beginif ( ~ rst_n) begincur_arb_gnt_r <= S1; // S1endelse if ( ~ busy) begincur_arb_gnt_r <= nx_arb_gnt; end
end
assign cur_arb_gnt = cur_arb_gnt_r;
always @( * ) beginif ( ~ busy) begincase ( cur_arb_gnt) // 循环仲裁S1: begin case ( 1 'b1) req2: nx_arb_gnt = S2; req3: nx_arb_gnt = S3; req4: nx_arb_gnt = S4; req1: nx_arb_gnt = S1; default: nx_arb_gnt = S1; endcaseendS2: begin case ( 1 'b1) req3: nx_arb_gnt = S3; req4: nx_arb_gnt = S4; req1: nx_arb_gnt = S1; req2: nx_arb_gnt = S2; default: nx_arb_gnt = S2; endcaseendS3: begin case ( 1 'b1) req4: nx_arb_gnt = S4; req1: nx_arb_gnt = S1; req2: nx_arb_gnt = S2; req3: nx_arb_gnt = S3; default: nx_arb_gnt = S3; endcaseendS4: begincase ( 1 'b1) req1: nx_arb_gnt = S1; req2: nx_arb_gnt = S2; req3: nx_arb_gnt = S3; req4: nx_arb_gnt = S4; default: nx_arb_gnt = S4; endcaseenddefault: nx_arb_gnt = S1; endcaseendelse beginnx_arb_gnt = cur_arb_gnt; end
end
endmodule