PCIe寄存器之二-编程知识

关键字索引：

CAP_PM 对应：Capabilities: [c0] Power Management
CAP_MSI 对应：Capabilities: [c8] MSI
CAP_MSIX对应：Capabilities: [e0] MSI-X
CAP_EXP 对应：Capabilities: [70] Express (v2) Endpoint
以上 [] 内的字符是依照不同设备变化的，并非都是，具体依照 lspci -vvv 显示的来

01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM981/PM981/PM983 (prog-if 02 [NVM Express])Subsystem: Samsung Electronics Co Ltd Device a801Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-Latency: 0, Cache Line Size: 64 bytesInterrupt: pin A routed to IRQ 48NUMA node: 0Region 0: Memory at c0800000 (64-bit, non-prefetchable) [size=16K]Capabilities: [40] Power Management version 3Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+Address: 0000000000000000  Data: 0000Capabilities: [70] Express (v2) Endpoint, MSI 00DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimitedExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000WDevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-MaxPayload 256 bytes, MaxReadReq 512 bytesDevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-LnkCap: Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64usClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not SupportedDevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF DisabledLnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-Compliance De-emphasis: -6dBLnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-Capabilities: [b0] MSI-X: Enable+ Count=33 Masked-Vector table: BAR=0 offset=00003000PBA: BAR=0 offset=00002000Capabilities: [100 v2] Advanced Error ReportingUESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00Capabilities: [158 v1] Power Budgeting <?>Capabilities: [168 v1] #19Capabilities: [188 v1] Latency Tolerance ReportingMax snoop latency: 1048576nsMax no snoop latency: 1048576nsCapabilities: [190 v1] L1 PM SubstatesL1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+PortCommonModeRestoreTime=10us PortTPowerOnTime=10usKernel driver in use: nvmeKernel modules: nvme

[root@localhost ~]# ll /sys/block/| grep nvme
lrwxrwxrwx. 1 root root 0 Nov  4 15:25 nvme0n1 -> ../devices/pci0000:00/0000:00:02.1/0000:01:00.0/nvme/nvme0/nvme0n1

读取硬盘上层Root Port端的Target Link Speed:
位置是 CAP_EXP 也可参考lspci的返回值Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00，如我这里是 58，偏移量 30h,得到命令：
setpci -s 00:02.1 CAP_EXP+30.b
在我这个平台上等同于（不同平台索引号不同，所以建议直接用CAP_EXP代替）
setpci -s 01:00.0 58+30.b
返回值代表Link Speed:
01 = 0001 = 2.5GT/s GEN1
02 = 0010 = 5GT/s GEN2
03 = 0011 = 8GT/s GEN3
04 = 0100 = 16GT/s Gen4
05 = 0101 = 32GT/s GEN5

[root@localhost ~]# setpci -s 00:02.1 CAP_EXP+30.b
03
[root@localhost ~]# setpci -s 00:02.1 58+30.b
03
[root@localhost ~]#

修改Traget Link Speed:
修改为Gen1:setpci -s 00:02.1 CAP_EXP+30.b=1

[root@localhost ~]# setpci -s 00:02.1 CAP_EXP+30.b=1
[root@localhost ~]# setpci -s 00:02.1 CAP_EXP+30.b
01
[root@localhost ~]# lspci -vvv -s 00:02.1|grep -E "LnkSta:|LnkCtl2"LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
[root@localhost ~]# lspci -vvv -s 01:00.0|grep -E "LnkSta:|LnkCtl2"LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-

可以看到root port 端已修改Target Speed为 2.5GT，但LnkSta还是 8GT，我们读读盘端，盘端均未改变，依然为8GT
对root port端下 Retrain命令：

[root@localhost ~]# setpci -s 00:02.1 CAP_EXP+10.b=0x60
[root@localhost ~]# lspci -vvv -s 00:02.1|grep -E "LnkSta:|LnkCtl2"LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
[root@localhost ~]# lspci -vvv -s 01:00.0|grep -E "LnkSta:|LnkCtl2"LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-